Master Thesis: AI-Driven Debug Analysis for ASIC Verification

Join our Team

About this opportunity


Ericsson is offering an exciting Master's thesis opportunity in Lund in applying artificial intelligence to ASIC verification. Debugging verification failures is often time consuming because engineers must analyze simulation data, waveforms, logs, assertions, coverage information, design hierarchy and interactions between components to identify the underlying root cause.

In this thesis, you will investigate how AI-based systems, including agentic AI approaches, can support automated or semi-automated verification debug. The work will compare promising combinations of AI engines, tools and control methods using representative verification failures and a defined evaluation methodology.

The expected outcome is a comparative assessment that identifies the strengths and limitations of different approaches and provides recommendations for using AI-driven debug methods in practical verification environments.

What you will do

• Explore AI-based methods for analyzing ASIC verification failures and identifying likely root causes.
• Investigate different control strategies, such as prompt-based workflows, structured analysis steps, tool invocation, iterative reasoning and specialized agents.
• Integrate and analyze relevant verification artifacts, which may include simulation logs, waveform derived information, test results, design metadata and other debug data.
• Define an evaluation methodology and compare the selected approaches against representative failures.
• Assess each approach based on speed, accuracy, resource efficiency, robustness, and usefulness to verification engineers.
• Compare the results with a suitable baseline, such as conventional manual debug or a simpler AI-based approach.
• Document your findings, limitations and recommendations clearly.

The skills you bring

• You are pursuing a master's degree in electrical engineering, computer engineering, computer science or a related field.
• You have a background in digital design and coding using VHDL, Verilog or SystemVerilog.
• You have an interest in artificial intelligence, automated reasoning or applying AI to engineering workflows.
• You have strong analytical and problem-solving skills.
• You communicate and document technical work clearly.

• Knowledge in Computer Science, Electrical Engineering, or a related field.